摘要频率合成器是电子系统的核心部件,它的性能直接影响雷达、导航、通信等电子设备的性能指标。在各种高性能、宽动态范围的频率变换中,相位噪声是一个主要的限制因素。它作为频率合成器的重要指标,决定了系统的灵敏度和选择性能,一直是设计者的难点和重点。63500
通过对锁相环的工作原理、具体电路实现及相关问题的探讨,本文从理论方面对锁相环的设计进行研究,提出了L波段锁相环的一种设计方案。结合相关软件的计算机仿真,给出了可达到的具体技术指标。该设计可以广泛用于徽波通信、卫星通信及雷达和其它相关领域。本文设计的锁相环为1.8GHz~2GHz的L波段,输出功率为10dBm,相位噪声为-85dBm/Hz。
毕业论文关键词:锁相环 鉴相器 环路滤波器 压控振荡器
毕业设计说明书(论文)外文摘要
Title A Design of L Band Phase Locked Loop
Abstract
Frequency synthesizer is a key component in electronic systems, whose
performance directly affects the capability of various systems such as radar, navigation system, etc.In various frequency converter of high performance, wide dynamic range, phase noise is a main limiting factor. As an important target of frequency synthesizer design, phase noise determines system’s sensitivity and selectivity whose design is being the emphasis as well as nodus at all times.
The operation principle,certain circuit and related problems of phase locked loop are discussed. A design solution of phase locked loop in L band is proposed.According to the computer modeling with related software,the available specification are also attained. This design can be widely applied to microwave communication,satellite communication,radar and other related areas. The PLL this article discussed, its operating frequency is 1.8GHz~2GHz, the output power is 10dBm, the phase noise is -85dBm/Hz.
Keywords PLL Phase Detector Loop Filter VCO
1 引言 1
1.1 锁相环的应用 1
1.2 锁相环的研究背景 2
1.3 本课题研究内容及工作安排 3
2 锁相环的基本原理 4
2.1 锁相环的构成 4
2.2 数学模型和基本环路方程 6
2.2.1 鉴相器模型 6
2.2.2 环路滤波器 7
2.2.3 压控振荡器模型 9
2.2.4 环路相位模型和基本方程 10
2.3 锁相环主要技术指标 12
2.3.1 相位噪声 12
2.3.2 杂散 13
2.3.3 稳定性 13
2.4 本章小结 13
3 L波段锁相环的方案设计 14
3.1 设计要求 14
3.2 鉴相器的设计思路 14
3.2.1 ADF4212总体概述 14
3.2.2 ADF4212几种典型器件特征 15
3.2.3 ADF4212接口配置 16
3.3 环路滤波器的设计 17
3.4 压控振荡器的设计