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Thus, ' _ the resetting period is only a small fraction of the sam pling or integrating period. _ In accordance with the presentinvention, the cathode‘ing capacitors 139 or 190. grid of the integrator while its anode is connected to the cathode of the cathode follower 201. As previously stated, the potential of the control grid of the integrator is at approximately —1 volt. With the aid of the poten tial pider resistors 202 and 203, the control grid of the'cathode follower 201 is biased through resistors 204 to say —20 volts, so that the cathode of unit 201 will be approximately ——15 volts. Thus the coupling diode 192 is biased in such a manner that when the negative input potentials v are applied to resistor 186, diode 192 is not conducting and therefore represents a perfect gate having a resistance of 1000 megohms or more. The perfection of diode 192 in this non-conducting phase is essential for the reason that the resistance of resistor 186 is several megohms and the leakage path of the control grid must be of greater magnitude in order to not eifect the integrator. By employing the silicon junction diode 192, this condition is well satis?ed. The resetting positive pulses 205 and 206 raise the control grid of unit 201 above ground level and hence also the potential of the cathode of unit 201. Thus, the resetting pulses 198 and 200 pass through the now con ducting diode 192 and drive the control :grid of the inte grator'185 into the ‘grid-current region quickly discharg 1In FIG. 10, only two inte grator capacitors 189 and 190 are shown. In order to cover the requirements of integration at sheet velocities of from 20 inches per second to 600 inches per second and ‘integrating l to 20 inch lengths of the sheet material, a large number ‘of integrating capacitors are served by switch member 191. ‘Further, according to my invention, the diode coupling network consisting of diodes ‘157, 158, 159, 160 and 164 represent near ideal gates for the various functions which the system has to perform. For example, in the presence’ of the positive output signal 170 diode 158 conducts and diode ‘gates 157 and 160 are ‘closed thus separating the open gate 159 from the signal source which opened diode 158. The negative pulse 169 then passes through the ‘conducting diode ‘159 to the input of the integrator and the positive output signal 170 driving the output cathode follower 181 does not interact in ‘any way whatsoever with the negative output signal 169 which is fed to the integrator. Should the negative output signal 169 raise the integrator gate above the level of the peak value of the output signal 170, the gate 164 opens and the result ing output pulse 184 is bene?cially reinforced. The two channels of the amplifying system support but never inter fere with each other. When the phase of the output sig nals is ‘opposite to those of signals 169 ‘and 170,~gates which were open in the previous example close and those which were closed will open while the function of gate 164 remains identical. ‘ When the output signals, due to faint defects, are be low the trigger level of the output pulse generator and are detected by the integrator channel and as soon ‘as the ' rising plate potential of the integrator reaches the biasing level ‘of coupling diodes 157 and 158, the latter diode gates' close and the integrator output does not effect the signal content at the plates 152 and 153. ' The outputs of both channels are fed via resistor 183 to thegcontrol grid ‘of the cathode follower 181. The purpose of this resistor is to limit the consumption of the cathode follower 181 when the integrator output ap proaches the positive line potential +HT. ‘ , The use of coupling capacitor 163 is not essential. The outputs of gates 159 and 160 can be coupled direct to the integrator ,by a potential pider which is con_ nected between the junction of diodes 159 and 160 and the negative line —'HT. The point of such ipotenti-al pider, which is ‘at ground level, could then be connected to the junction :of resistors 186 and 187. Other direct coupled arrangements are possible by modifying the cir cuit'of the integrator shown in FIG. 10.. When such 10 15 25 30 35 4:0 45 50 terial is also integrated. While this method is not as e?icient as that of the AC. coupled version of FIG. 10, good results are obtainable.